d896657bf9
Device migrations: - cyd-4848S040c - guition-jc1060p470ciwy - guition-jc2432w328c - guition-jc3248w535c (known issue with display and touch, Shadowtrance will look into it) - guition-jc8048w550c - heltec-wifi-lora-32-v3 - lilygo-tdeck-max (excluding graphics) - lilygo-tdisplay - lilygo-tdisplay-s3 - lilygo-tdongle-s3 - lilygo-tlora-pager Driver migrations: - Implemented haptic driver interface in kernel - AXS15231b - BQ25896 - BQ27220 - CST328 - CST6xx - DRV2605 - JD9165 - Custom LilyGO driver for T-Lora Pager - SSD1306 - ST7701 - ST7735 - SY6970 - TCA8418 Fixes/improvements: - Boot app: support for multiple power devices, improved UI - lvgl_devices and related code: fixes for mapping - Support for arrays in dts parser
264 lines
8.1 KiB
YAML
264 lines
8.1 KiB
YAML
description: >
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Sitronix ST7701 display panel, driven over ESP-IDF's esp_lcd_st7701 component. Like
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espressif,esp32-rgb-display, pixel data goes out over the RGB (parallel timing-driven)
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interface, but the panel also has its own command interface: a bit-banged 3-wire SPI bus
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(CS/SCL/SDA over plain GPIOs) used to push the vendor bring-up sequence and, optionally,
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runtime commands (mirror, display on/off).
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compatible: "sitronix,st7701"
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properties:
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horizontal-resolution:
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type: int
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required: true
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description: Horizontal resolution in pixels
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vertical-resolution:
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type: int
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required: true
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description: Vertical resolution in pixels
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pixel-clock-hz:
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type: int
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required: true
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description: Pixel clock frequency in Hz
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hsync-pulse-width:
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type: int
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required: true
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description: Horizontal sync width, in PCLK periods
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hsync-back-porch:
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type: int
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required: true
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description: Number of PCLK periods between hsync and the start of line active data
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hsync-front-porch:
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type: int
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required: true
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description: Number of PCLK periods between the end of active data and the next hsync
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vsync-pulse-width:
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type: int
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required: true
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description: Vertical sync width, in lines
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vsync-back-porch:
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type: int
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required: true
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description: Number of invalid lines between vsync and the start of the frame
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vsync-front-porch:
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type: int
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required: true
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description: Number of invalid lines between the end of the frame and the next vsync
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hsync-idle-low:
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type: boolean
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default: false
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description: The hsync signal is low in the idle state
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vsync-idle-low:
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type: boolean
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default: false
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description: The vsync signal is low in the idle state
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de-idle-high:
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type: boolean
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default: false
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description: The DE signal is high in the idle state
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pclk-active-neg:
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type: boolean
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default: false
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description: Whether display data is clocked out on the falling edge of PCLK
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pclk-idle-high:
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type: boolean
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default: false
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description: The PCLK signal stays high in the idle phase
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data-width:
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type: int
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default: 16
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description: Number of parallel data lines wired (8 or 16)
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bits-per-pixel:
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type: int
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default: 16
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description: Color depth in bits per pixel (16, 18 or 24 - the ST7701 has no "match data-width" default)
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num-fbs:
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type: int
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default: 1
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description: Number of screen-sized frame buffers to allocate (0 or 1 = single-buffered)
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bounce-buffer-size-px:
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type: int
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default: 0
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description: Non-zero enables the DRAM bounce-buffer DMA path, sized in pixels
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sram-trans-align:
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type: int
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default: 8
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description: Alignment of buffers allocated in internal SRAM
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psram-trans-align:
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type: int
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default: 64
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description: Alignment of buffers allocated in PSRAM
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pin-hsync:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: HSYNC GPIO pin, optional for panels that only need DE (data-enable) sync
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pin-vsync:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: VSYNC GPIO pin, optional for panels that only need DE (data-enable) sync
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pin-de:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data-enable GPIO pin, optional
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pin-pclk:
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type: phandles
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required: true
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description: Pixel-clock GPIO pin
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pin-disp:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Optional display-enable control GPIO pin
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pin-data0:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 0 GPIO pin
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pin-data1:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 1 GPIO pin
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pin-data2:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 2 GPIO pin
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pin-data3:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 3 GPIO pin
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pin-data4:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 4 GPIO pin
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pin-data5:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 5 GPIO pin
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pin-data6:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 6 GPIO pin
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pin-data7:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 7 GPIO pin
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pin-data8:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 8 GPIO pin
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pin-data9:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 9 GPIO pin
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pin-data10:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 10 GPIO pin
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pin-data11:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 11 GPIO pin
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pin-data12:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 12 GPIO pin
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pin-data13:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 13 GPIO pin
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pin-data14:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 14 GPIO pin
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pin-data15:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Data bus bit 15 GPIO pin
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disp-active-low:
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type: boolean
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default: false
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description: A low level on the display-enable control signal turns the screen on
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refresh-on-demand:
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type: boolean
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default: false
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description: Only refresh the frame buffer on explicit draw_bitmap calls
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fb-in-psram:
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type: boolean
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default: true
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description: Allocate the frame buffer from PSRAM, preferentially
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double-fb:
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type: boolean
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default: false
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description: Allocate two screen-sized frame buffers (equivalent to num-fbs = 2)
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no-fb:
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type: boolean
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default: false
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description: Don't allocate a frame buffer; bounce buffer must be filled manually
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bb-invalidate-cache:
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type: boolean
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default: false
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description: Invalidate cache on bounce-buffer reads (can be dangerous with multi-core writers)
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swap-xy:
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type: boolean
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default: false
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description: Swap the X and Y axes
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mirror-x:
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type: boolean
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default: false
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description: Mirror the X axis
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mirror-y:
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type: boolean
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default: false
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description: Mirror the Y axis
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invert-color:
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type: boolean
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default: false
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description: Invert the panel's color output
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pin-cs:
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type: phandles
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required: true
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description: Chip-select GPIO pin for the bit-banged 3-wire command bus
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pin-scl:
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type: phandles
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required: true
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description: Clock GPIO pin for the bit-banged 3-wire command bus
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pin-sda:
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type: phandles
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required: true
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description: Data GPIO pin for the bit-banged 3-wire command bus (write-only, no MISO)
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scl-active-edge:
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type: boolean
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default: false
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description: Sample data on the falling edge of SCL instead of the rising edge
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pin-reset:
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type: phandles
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default: GPIO_PIN_SPEC_NONE
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description: Optional hardware reset pin for the panel. Falls back to a software reset
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(sent over the 3-wire bus) if not set.
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reset-active-high:
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type: boolean
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default: false
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description: Whether the reset pin is active high
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mirror-by-cmd:
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type: boolean
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default: false
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description: Implement mirror() by sending an LCD command instead of flipping the RGB
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peripheral's scan direction in software
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auto-del-panel-io:
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type: boolean
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default: false
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description: Release the 3-wire command bus (and its pins) right after bring-up. Only
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useful when those pins are physically shared with the RGB data/sync pins; leave false
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if the 3-wire bus has its own dedicated pins, since runtime commands (mirror-by-cmd,
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disp-on-off without a dedicated pin-disp) need the bus to stay alive.
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init-sequence:
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type: array
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element-type: uint8_t
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description: >
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Custom vendor bring-up sequence, flattened into bytes as a run of
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[cmd, data-length, delay-ms, data-length bytes of data...] entries, e.g.
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`init-sequence = [0xFF 5 0 0x77 0x01 0x00 0x00 0x10 0x11 0 120 0x29 0 0];`.
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Omit to use the ST7701 component's own built-in default sequence.
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backlight:
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type: phandle
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default: "NULL"
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description: Optional reference to this display's backlight device
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