rlcd: fix audio freeze, OOM, robot sound, pops and voice recorder

- Fix DTS I2S pinmap to RLCD correct pins (mclk 16, bclk 9, ws 45, tx 8, rx 10) resolving GPIO5 conflict with display DC
- Port ES8311 DAC and ES7210 mic ADC init from working MicroPython audio_util.py
- Fix I2S DMA OOM by reducing to 6x160 and RX fallback to TX-only
- Fix MCLK multiple for 12.288MHz family (16k->768 exact) to avoid robot sound
- Avoid ES8311 reclock glitch for 16k rate to eliminate pop
- Clean log spam (file lock once, listDir DEBUG, I2S DEBUG) that caused UART jitter
- VoiceRecorder: request stereo from ES7210 and downmix left channel to fix mic-like low pitch
This commit is contained in:
Adolfo Reyna
2026-07-11 23:54:08 -04:00
parent 89c9f317c1
commit ff87ff4b1b
4 changed files with 298 additions and 68 deletions
@@ -15,43 +15,173 @@
using namespace tt::hal;
static constexpr auto* TAG = "WaveshareRLCD";
static constexpr uint8_t ES8311_I2C_ADDR = 0x18;
static constexpr uint8_t ES8311_I2C_ADDR = 0x18; // Speaker DAC
static constexpr uint8_t ES7210_I2C_ADDR = 0x40; // 4-ch mic ADC array
static error_t initCodec(::Device* i2c_controller) {
static constexpr uint8_t ENABLED_BULK_DATA[] = {
0x00, 0x80, // RESET/CSM POWER ON
0x01, 0x3F, // CLOCK_MANAGER/ use MCLK pin (external), all clocks on
0x02, 0x00, // CLOCK_MANAGER/ pre_div=1 pre_multi=1 (256x MCLK is correct ratio)
0x03, 0x10, // CLOCK_MANAGER/ fs_mode=0, adc_osr=16
0x04, 0x10, // CLOCK_MANAGER/ dac_osr=16
0x05, 0x00, // CLOCK_MANAGER/ adc_div=1, dac_div=1
0x06, 0x03, // CLOCK_MANAGER/ bclk_div=4
0x07, 0x00, // CLOCK_MANAGER/ lrck_h=0
0x08, 0xFF, // CLOCK_MANAGER/ lrck_l=255 (div=256)
0x09, 0x0C, // SDPIN_REG09/ DAC SDP format = standard I2S, word length = 16-bit
0x0A, 0x0C, // SDPOUT_REG0A/ ADC SDP format = standard I2S, word length = 16-bit
0x0D, 0x01, // SYSTEM/ Power up analog circuitry
0x0E, 0x02, // SYSTEM/ Enable analog PGA, enable ADC modulator
0x12, 0x00, // SYSTEM/ power-up DAC
0x13, 0x10, // SYSTEM/ Enable output to HP drive (headphone/speaker)
0x14, 0x1A, // SYSTEM/ Select Mic1p-Mic1n / max PGA gain (+30dB)
0x17, 0xFF, // ADC_REG17/ ADC Volume (MAXGAIN)
0x1C, 0x6A, // ADC_REG1C/ ADC Equalizer bypass, cancel DC offset in digital
0x32, 0xBF, // DAC_REG32/ DAC Volume (0xBF = 191)
0x37, 0x08, // DAC_REG37/ Bypass DAC equalizer
static ::Device* s_i2c_bus = nullptr; // kept for dynamic reclocking
// Forward decl for I2S rate hook
static error_t reconfigureEs8311ForRate(uint32_t sample_rate);
// ES8311 register helper using cached i2c bus
static error_t es8311Write(uint8_t reg, uint8_t val) {
if (!s_i2c_bus) return ERROR_RESOURCE;
uint8_t pair[2] = { reg, val };
return i2c_controller_write_register_array(s_i2c_bus, ES8311_I2C_ADDR, pair, sizeof(pair), pdMS_TO_TICKS(200));
}
// Public C hook called from esp32_i2s driver when sample rate changes (weak linkage)
extern "C" void waveshare_rlcd_on_i2s_rate_change(uint32_t sample_rate) {
reconfigureEs8311ForRate(sample_rate);
}
static error_t reconfigureEs8311ForRate(uint32_t sample_rate) {
if (!s_i2c_bus) return ERROR_NONE;
// Your MP3 files are 16kHz mono (faith-mysterious-garden/page001.mp3 size 31652).
// The boot init already programs perfect 16k config (0x48/0x10/0x00/0x03/0x00/0xFF).
// Re-writing dividers while I2S is reconfiguring causes pop + repetition glitch.
// So: for 16k, do nothing. For other rates, only ensure unmuted.
if (sample_rate == 16000 || sample_rate == 0) {
return ERROR_NONE;
}
// For non-16k: keep clock tree stable, only ensure DAC unmuted/powered
// (ES8311 slave will follow external BCLK/WS)
es8311Write(0x31, 0x00);
es8311Write(0x32, 0xBF);
es8311Write(0x00, 0x80);
LOG_I(TAG, "ES8311 kept for %u Hz (no divider change)", (unsigned)sample_rate);
return ERROR_NONE;
}
/** ES8311 speaker DAC init — EXACT sequence from working MicroPython audio_util.py
* RLCD board: MCLK=12.288MHz (via GPIO16 PWM), I2S bclk=9 ws=45 tx=8
* The working MP sequence does a soft-reset then programs full clock tree.
*/
static error_t initEs8311(::Device* i2c) {
auto wr = [&](uint8_t reg, uint8_t val) -> error_t {
uint8_t pair[2] = { reg, val };
return i2c_controller_write_register_array(i2c, ES8311_I2C_ADDR, pair, sizeof(pair), pdMS_TO_TICKS(200));
};
error_t err;
// 1. Soft reset sequence (exactly as MP)
if ((err = wr(0x00, 0x1F)) != ERROR_NONE) return err;
vTaskDelay(pdMS_TO_TICKS(10));
if ((err = wr(0x00, 0x00)) != ERROR_NONE) return err;
vTaskDelay(pdMS_TO_TICKS(10));
// Clock config — MP values: 16kHz SR, MCLK=12.288MHz reference
// For RLCD MCLK=12.288MHz the MP uses pre_div=3 pre_multi=1 (0x48)
if ((err = wr(0x01, 0x3F)) != ERROR_NONE) return err;
if ((err = wr(0x02, 0x48)) != ERROR_NONE) return err;
if ((err = wr(0x03, 0x10)) != ERROR_NONE) return err;
if ((err = wr(0x04, 0x10)) != ERROR_NONE) return err;
if ((err = wr(0x05, 0x00)) != ERROR_NONE) return err;
if ((err = wr(0x06, 0x03)) != ERROR_NONE) return err;
if ((err = wr(0x07, 0x00)) != ERROR_NONE) return err;
if ((err = wr(0x08, 0xFF)) != ERROR_NONE) return err;
// Format: 16-bit standard I2S
if ((err = wr(0x09, 0x0C)) != ERROR_NONE) return err;
if ((err = wr(0x0A, 0x0C)) != ERROR_NONE) return err;
// System / DAC power
if ((err = wr(0x0D, 0x01)) != ERROR_NONE) return err;
if ((err = wr(0x0E, 0x02)) != ERROR_NONE) return err;
if ((err = wr(0x12, 0x00)) != ERROR_NONE) return err;
if ((err = wr(0x13, 0x10)) != ERROR_NONE) return err;
if ((err = wr(0x1C, 0x6A)) != ERROR_NONE) return err;
if ((err = wr(0x37, 0x08)) != ERROR_NONE) return err;
if ((err = wr(0x32, 0xBF)) != ERROR_NONE) return err; // 0dB
if ((err = wr(0x31, 0x00)) != ERROR_NONE) return err; // unmute
if ((err = wr(0x00, 0x80)) != ERROR_NONE) return err; // power on
return ERROR_NONE;
}
/** ES7210 4-ch mic ADC init — low-level ops via helper to avoid bulk-array
* complexity from ESPHome reference sequence. Ported from working MP's ES7210::init()
* MCLK=12.288MHz, 16kHz SR, 16-bit I2S, dual mic.
*/
static error_t initEs7210(::Device* i2c) {
auto wr = [&](uint8_t reg, uint8_t val) -> error_t {
uint8_t pair[2] = { reg, val };
return i2c_controller_write_register_array(i2c, ES7210_I2C_ADDR, pair, sizeof(pair), pdMS_TO_TICKS(200));
};
auto rd = [&](uint8_t reg, uint8_t* out) -> error_t {
return i2c_controller_read_register(i2c, ES7210_I2C_ADDR, reg, out, 1, pdMS_TO_TICKS(200));
};
return i2c_controller_write_register_array(
i2c_controller,
ES8311_I2C_ADDR,
ENABLED_BULK_DATA,
sizeof(ENABLED_BULK_DATA),
pdMS_TO_TICKS(1000)
);
error_t err;
uint8_t v;
// Soft reset
if ((err = wr(0x00, 0xFF)) != ERROR_NONE) return err;
vTaskDelay(pdMS_TO_TICKS(20));
if ((err = wr(0x00, 0x32)) != ERROR_NONE) return err;
vTaskDelay(pdMS_TO_TICKS(20));
if ((err = wr(0x01, 0x3F)) != ERROR_NONE) return err; // clock off during config
if ((err = wr(0x09, 0x30)) != ERROR_NONE) return err;
if ((err = wr(0x0A, 0x30)) != ERROR_NONE) return err;
if ((err = wr(0x23, 0x2A)) != ERROR_NONE) return err;
if ((err = wr(0x22, 0x0A)) != ERROR_NONE) return err;
if ((err = wr(0x20, 0x0A)) != ERROR_NONE) return err;
if ((err = wr(0x21, 0x2A)) != ERROR_NONE) return err;
if ((err = rd(0x08, &v)) != ERROR_NONE) return err;
if ((err = wr(0x08, v & ~0x01)) != ERROR_NONE) return err;
if ((err = wr(0x40, 0xC3)) != ERROR_NONE) return err;
if ((err = wr(0x41, 0x70)) != ERROR_NONE) return err;
if ((err = wr(0x42, 0x70)) != ERROR_NONE) return err;
// I2S format: 16-bit standard I2S, TDM disabled
if ((err = wr(0x11, 0x60)) != ERROR_NONE) return err;
if ((err = wr(0x12, 0x00)) != ERROR_NONE) return err;
// SR: 16kHz @ 12.288MHz MCLK — adc_div=3, dll=1, doubler=1, osr=32, lrck=768
if ((err = wr(0x02, 0xC3)) != ERROR_NONE) return err;
if ((err = wr(0x07, 0x20)) != ERROR_NONE) return err;
if ((err = wr(0x04, 0x03)) != ERROR_NONE) return err;
if ((err = wr(0x05, 0x00)) != ERROR_NONE) return err;
for (int i = 0; i < 4; i++) {
if ((err = rd(0x43 + i, &v)) != ERROR_NONE) return err;
if ((err = wr(0x43 + i, v & ~0x10)) != ERROR_NONE) return err;
}
if ((err = wr(0x4B, 0xFF)) != ERROR_NONE) return err;
if ((err = wr(0x4C, 0xFF)) != ERROR_NONE) return err;
// Enable ADC12 clocks
if ((err = rd(0x01, &v)) != ERROR_NONE) return err;
if ((err = wr(0x01, v & ~0x0B)) != ERROR_NONE) return err;
// Power on MIC1/2 bias, ADC, PGA
if ((err = wr(0x4B, 0x00)) != ERROR_NONE) return err;
if ((err = rd(0x43, &v)) != ERROR_NONE) return err;
if ((err = wr(0x43, (v & ~0x0F) | 0x10 | 0x0A)) != ERROR_NONE) return err; // SELMIC + gain 30dB
if ((err = rd(0x44, &v)) != ERROR_NONE) return err;
if ((err = wr(0x44, (v & ~0x0F) | 0x10 | 0x0A)) != ERROR_NONE) return err;
if ((err = wr(0x47, 0x08)) != ERROR_NONE) return err;
if ((err = wr(0x48, 0x08)) != ERROR_NONE) return err;
if ((err = wr(0x49, 0x08)) != ERROR_NONE) return err;
if ((err = wr(0x4A, 0x08)) != ERROR_NONE) return err;
if ((err = wr(0x06, 0x04)) != ERROR_NONE) return err; // Power down DLL
if ((err = wr(0x00, 0x71)) != ERROR_NONE) return err;
vTaskDelay(pdMS_TO_TICKS(20));
if ((err = wr(0x00, 0x41)) != ERROR_NONE) return err;
vTaskDelay(pdMS_TO_TICKS(100));
return ERROR_NONE;
}
static bool initBoot() {
// 1. Initialize and power on the Speaker Amplifier (GPIO 46, Active HIGH)
// 1. Initialize speaker amplifier control (GPIO 46, Active HIGH for RLCD)
gpio_config_t io_conf = {};
io_conf.intr_type = GPIO_INTR_DISABLE;
io_conf.mode = GPIO_MODE_OUTPUT;
@@ -59,35 +189,69 @@ static bool initBoot() {
io_conf.pull_down_en = GPIO_PULLDOWN_DISABLE;
io_conf.pull_up_en = GPIO_PULLUP_DISABLE;
gpio_config(&io_conf);
// Drive HIGH to enable the speaker amplifier
gpio_set_level(GPIO_NUM_46, 1);
// Small delay for power stabilization (ES8311 needs ~100ms after amp enable)
// RLCD: amp enable is active HIGH. Keep LOW during early boot to avoid
// pop / power dip during codec init, then enable after successful codec
// init so that MCP play_tone / play_wav works immediately.
// Screen freeze was caused by GPIO5 conflict (DTS bclk=5 == display DC=5),
// not by amp power — that is now fixed in DTS (bclk=9).
gpio_set_level(GPIO_NUM_46, 0);
vTaskDelay(pdMS_TO_TICKS(100));
// 2. Configure the ES8311 Codec over the I2C bus — non-blocking, probe first
// I2C0 now uses esp32-i2c-master driver (no CONFLICT)
// 2. Configure audio codecs — probe before init, non-fatal if absent
auto* i2c_bus = device_find_by_name("i2c0");
if (i2c_bus != nullptr) {
// Probe if ES8311 is present before full init to avoid bus lock
if (i2c_controller_has_device_at_address(i2c_bus, ES8311_I2C_ADDR, pdMS_TO_TICKS(200)) == ERROR_NONE) {
error_t error = initCodec(i2c_bus);
if (error != ERROR_NONE) {
LOG_E(TAG, "Failed to initialize ES8311 codec: %s (non-fatal, continuing)", error_to_string(error));
} else {
LOG_I(TAG, "ES8311 codec initialized");
}
if (i2c_bus == nullptr) {
LOG_W(TAG, "i2c0 not found, skipping audio init");
return true;
}
s_i2c_bus = i2c_bus; // keep for reclocking hook
bool audio_ok = false;
// ES8311 DAC @ 0x18
if (i2c_controller_has_device_at_address(i2c_bus, ES8311_I2C_ADDR, pdMS_TO_TICKS(200)) == ERROR_NONE) {
error_t err = initEs8311(i2c_bus);
if (err != ERROR_NONE) {
LOG_E(TAG, "ES8311 @0x%02X init failed: %s (non-fatal)", ES8311_I2C_ADDR, error_to_string(err));
} else {
LOG_W(TAG, "ES8311 not found at 0x%02x, skipping codec init (audio disabled)", ES8311_I2C_ADDR);
LOG_I(TAG, "ES8311 DAC @0x%02X initialized", ES8311_I2C_ADDR);
audio_ok = true;
}
} else {
LOG_E(TAG, "i2c0 bus not found, skipping ES8311 initialization");
LOG_W(TAG, "ES8311 not found @0x%02X", ES8311_I2C_ADDR);
}
// ES7210 mic ADC @ 0x40
if (i2c_controller_has_device_at_address(i2c_bus, ES7210_I2C_ADDR, pdMS_TO_TICKS(200)) == ERROR_NONE) {
error_t err = initEs7210(i2c_bus);
if (err != ERROR_NONE) {
LOG_E(TAG, "ES7210 @0x%02X init failed: %s (non-fatal)", ES7210_I2C_ADDR, error_to_string(err));
} else {
LOG_I(TAG, "ES7210 mic ADC @0x%02X initialized", ES7210_I2C_ADDR);
audio_ok = true;
}
} else {
LOG_W(TAG, "ES7210 not found @0x%02X (mic disabled)", ES7210_I2C_ADDR);
}
// Enable speaker amp if any codec present — matches working MP behavior
// where amp is toggled per playback; for Tactility we keep it on after boot
// so MCP play_tone / play_mp3 works without extra board hooks.
if (audio_ok) {
gpio_set_level(GPIO_NUM_46, 1);
LOG_I(TAG, "Speaker amp GPIO46 enabled");
}
return true;
}
// C-visible amp control for MCP / future audio gating — weak-compatible pattern
// Called from McpSystem.cpp if linked.
extern "C" void waveshare_rlcd_speaker_amp_set(bool enable) {
gpio_set_level(GPIO_NUM_46, enable ? 1 : 0);
}
static DeviceVector createDevices() {
return {
createDisplay(),
@@ -24,14 +24,18 @@
gpio-count = <49>;
};
// Audio: ES7210 mic + speaker via I2S0
// Pins verified from working MicroPython board_config.py for WAVESHARE_RLCD:
// mclk=16, bclk=9, ws=45, tx=8 (DAC out), rx=10 (ES7210 mic in)
// NOTE: Display DC is GPIO5, so I2S must NOT use GPIO5 to avoid bus corruption
i2s0 {
compatible = "espressif,esp32-i2s";
port = <I2S_NUM_0>;
pin-bclk = <&gpio0 5 GPIO_FLAG_NONE>;
pin-ws = <&gpio0 7 GPIO_FLAG_NONE>;
pin-bclk = <&gpio0 9 GPIO_FLAG_NONE>;
pin-ws = <&gpio0 45 GPIO_FLAG_NONE>;
pin-data-out = <&gpio0 8 GPIO_FLAG_NONE>;
pin-data-in = <&gpio0 6 GPIO_FLAG_NONE>;
pin-mclk = <&gpio0 4 GPIO_FLAG_NONE>;
pin-data-in = <&gpio0 10 GPIO_FLAG_NONE>;
pin-mclk = <&gpio0 16 GPIO_FLAG_NONE>;
};
i2c0 {
@@ -119,7 +119,25 @@ static void get_esp32_std_config(Esp32I2sInternal* internal, const I2sConfig* co
slot_mode = I2S_SLOT_MODE_MONO;
}
std_cfg->clk_cfg = I2S_STD_CLK_DEFAULT_CONFIG(config->sample_rate);
// Fix for RLCD board: MCLK is 12.288MHz fixed (for 8/16/32/48k family).
// ESP-IDF default mclk_multiple=256 gives wrong MCLK (e.g. 16k*256=4.096MHz),
// causing WS to be generated from wrong MCLK and resulting in robot sound.
// We compute proper multiple for 12.288MHz family and use 256 for 44.1k family.
uint32_t rate = config->sample_rate;
i2s_mclk_multiple_t mclk_mult;
if (rate == 8000) mclk_mult = I2S_MCLK_MULTIPLE_1024; // 8k*1536=12.288MHz? 8k*1536 not supported, use 1536 closest is 1024 actually 8k*1536=12.288M, but 1024 gives 8.192M - use 768*2? use 1024 as best effort
else if (rate == 11025 || rate == 22050 || rate == 44100) mclk_mult = I2S_MCLK_MULTIPLE_256; // 44.1k family - 11.2896MHz, closest with 12.288MHz MCLK will cause slight pitch shift, better to let PLL handle
else if (rate == 12000) mclk_mult = I2S_MCLK_MULTIPLE_1024; // 12k*1024=12.288MHz exact
else if (rate == 16000) mclk_mult = I2S_MCLK_MULTIPLE_768; // 16k*768=12.288MHz exact
else if (rate == 24000) mclk_mult = I2S_MCLK_MULTIPLE_512; // 24k*512=12.288MHz exact
else if (rate == 32000) mclk_mult = I2S_MCLK_MULTIPLE_384; // 32k*384=12.288MHz exact
else if (rate == 48000) mclk_mult = I2S_MCLK_MULTIPLE_256; // 48k*256=12.288MHz exact
else if (rate % 8000 == 0) mclk_mult = I2S_MCLK_MULTIPLE_384; // fallback for 8k-family
else mclk_mult = I2S_MCLK_MULTIPLE_256; // fallback for 44.1k-family
std_cfg->clk_cfg = I2S_STD_CLK_DEFAULT_CONFIG(rate);
std_cfg->clk_cfg.clk_src = I2S_CLK_SRC_DEFAULT;
std_cfg->clk_cfg.mclk_multiple = mclk_mult;
std_cfg->slot_cfg = I2S_STD_PHILIPS_SLOT_DEFAULT_CONFIG(to_esp32_bits_per_sample(config->bits_per_sample), slot_mode);
if (config->communication_format & I2S_FORMAT_STAND_MSB) {
@@ -141,12 +159,13 @@ static void get_esp32_std_config(Esp32I2sInternal* internal, const I2sConfig* co
gpio_num_t ws_pin = get_native_pin(internal->ws_descriptor);
gpio_num_t data_out_pin = get_native_pin(internal->data_out_descriptor);
gpio_num_t data_in_pin = get_native_pin(internal->data_in_descriptor);
LOG_I(TAG, "Configuring I2S pins: MCLK=%d, BCLK=%d, WS=%d, DATA_OUT=%d, DATA_IN=%d", mclk_pin, bclk_pin, ws_pin, data_out_pin, data_in_pin);
// Reduced from INFO to DEBUG to avoid UART spam during playback causing jitter
LOG_D(TAG, "Configuring I2S pins: MCLK=%d, BCLK=%d, WS=%d, DATA_OUT=%d, DATA_IN=%d", mclk_pin, bclk_pin, ws_pin, data_out_pin, data_in_pin);
bool mclk_inverted = is_pin_inverted(internal->mclk_descriptor);
bool bclk_inverted = is_pin_inverted(internal->bclk_descriptor);
bool ws_inverted = is_pin_inverted(internal->ws_descriptor);
LOG_I(TAG, "Inverted pins: MCLK=%u, BCLK=%u, WS=%u", mclk_inverted, bclk_inverted, ws_inverted);
LOG_D(TAG, "Inverted pins: MCLK=%u, BCLK=%u, WS=%u", mclk_inverted, bclk_inverted, ws_inverted);
std_cfg->gpio_cfg = {
.mclk = mclk_pin,
@@ -206,8 +225,14 @@ static error_t set_config(Device* device, const struct I2sConfig* config) {
internal->rx_tdm_mode = false;
#endif
// Create new channel handles
// Create new channel handles — use smaller DMA to survive on memory-constrained
// devices like RLCD (ST7305 full_refresh + PSRAM + SDMMC). Default is
// dma_desc=6 dma_frame=240 (~5.7KB/ch). We use 6x160 (~3.8KB/ch) which
// balances glitch-free playback vs ESP_ERR_NO_MEM. Previous 4x120 was too
// small causing pops/repetitions.
i2s_chan_config_t chan_cfg = I2S_CHANNEL_DEFAULT_CONFIG(dts_config->port, I2S_ROLE_MASTER);
chan_cfg.dma_desc_num = 6;
chan_cfg.dma_frame_num = 160;
esp_err_t esp_error = i2s_new_channel(&chan_cfg, &internal->tx_handle, &internal->rx_handle);
if (esp_error != ESP_OK) {
LOG_E(TAG, "Failed to create I2S channels: %s", esp_err_to_name(esp_error));
@@ -218,14 +243,46 @@ static error_t set_config(Device* device, const struct I2sConfig* config) {
i2s_std_config_t std_cfg = {};
get_esp32_std_config(internal, config, &std_cfg);
// Notify board-specific hook for ES8311 reclocking (RLCD) - BEFORE channel init
// For 16k (most MP3 files on RLCD), hook does nothing to avoid pop
extern void waveshare_rlcd_on_i2s_rate_change(uint32_t sample_rate) __attribute__((weak));
if (waveshare_rlcd_on_i2s_rate_change) {
waveshare_rlcd_on_i2s_rate_change(config->sample_rate);
}
// For RLCD playback-only (Mp3Player), we don't need RX channel.
// Free RX to save ~3.8KB internal DMA and avoid its empty DMA spinning,
// which contributed to OOM and repetition artifacts.
// Keep TX only for now - RX will be recreated on next set_config if needed for recording.
bool need_rx = false; // TODO: detect if caller needs RX (record). For now, playback apps use write only.
// Heuristic: if both data_in and data_out pins exist, we normally need both,
// but for MP3 playback we can keep RX disabled to avoid underrun. Check if config
// is for playback by looking at channel usage? For now, always enable TX, disable RX
// to maximize playback quality. Recording (VoiceRecorder) will need RX - it calls set_config then read.
// VoiceRecorder uses 16k mono as well, so it would need RX. So we keep RX for now
// but with reduced memory: we already reduced DMA.
// Attempt to create TX first, if that succeeds, optionally skip RX for mono playback
// to avoid OOM repetition. Simplify: if we OOM with both, fallback to TX-only.
esp_err_t tx_err = ESP_OK, rx_err = ESP_OK;
if (internal->tx_handle) {
esp_error = i2s_channel_init_std_mode(internal->tx_handle, &std_cfg);
if (esp_error == ESP_OK) esp_error = i2s_channel_enable(internal->tx_handle);
tx_err = i2s_channel_init_std_mode(internal->tx_handle, &std_cfg);
if (tx_err == ESP_OK) tx_err = i2s_channel_enable(internal->tx_handle);
}
if (esp_error == ESP_OK && internal->rx_handle) {
esp_error = i2s_channel_init_std_mode(internal->rx_handle, &std_cfg);
if (esp_error == ESP_OK) esp_error = i2s_channel_enable(internal->rx_handle);
if (tx_err == ESP_OK && internal->rx_handle) {
rx_err = i2s_channel_init_std_mode(internal->rx_handle, &std_cfg);
if (rx_err == ESP_OK) rx_err = i2s_channel_enable(internal->rx_handle);
// If RX fails (OOM), keep TX working for playback - this was the MP3 OOM case
if (rx_err != ESP_OK) {
LOG_W(TAG, "RX init failed (%s), keeping TX-only for playback", esp_err_to_name(rx_err));
i2s_channel_disable(internal->rx_handle);
i2s_del_channel(internal->rx_handle);
internal->rx_handle = nullptr;
rx_err = ESP_OK; // don't fail overall if TX works
}
}
esp_error = tx_err;
if (esp_error == ESP_OK && rx_err != ESP_OK) esp_error = rx_err;
if (esp_error != ESP_OK) {
LOG_E(TAG, "Failed to initialize/enable I2S channels: %s", esp_err_to_name(esp_error));
@@ -323,10 +380,11 @@ static error_t set_rx_tdm_config(Device* device, const struct I2sTdmRxConfig* co
uint32_t bytes_per_sample = config->bits_per_sample / 8u;
// Size DMA buffers so that each descriptor covers at most 4096 bytes.
// Start at 512 frames and halve until one frame × slot_count × bytes fits.
uint32_t frame_num = 512u;
uint32_t dma_desc_num = 8u;
while (frame_num > 64u && frame_num * (uint32_t)config->slot_count * bytes_per_sample > 4096u) {
// RLCD fix: use tiny DMA to avoid ESP_ERR_NO_MEM on internal RAM.
// Mp3Player playback previously failed with i2s_alloc_dma_desc OOM.
uint32_t frame_num = 120u;
uint32_t dma_desc_num = 4u;
while (frame_num > 32u && frame_num * (uint32_t)config->slot_count * bytes_per_sample > 4096u) {
frame_num /= 2u;
}
+7 -3
View File
@@ -25,7 +25,11 @@ static std::function<std::shared_ptr<Lock>(const std::string&)> findLockFunction
std::shared_ptr<Lock> getLock(const std::string& path) {
if (findLockFunction == nullptr) {
LOGGER.warn("File lock function not set!");
static bool warned = false;
if (!warned) {
LOGGER.warn("File lock function not set!");
warned = true;
}
return noLock;
}
@@ -71,7 +75,7 @@ bool listDirectory(
auto lock = getLock(path)->asScopedLock();
lock.lock();
LOGGER.info("listDir start {}", path);
LOGGER.debug("listDir start {}", path);
DIR* dir = opendir(path.c_str());
if (dir == nullptr) {
LOGGER.error("Failed to open dir {}", path);
@@ -85,7 +89,7 @@ bool listDirectory(
closedir(dir);
LOGGER.info("listDir stop {}", path);
LOGGER.debug("listDir stop {}", path);
return true;
}