rlcd: fix audio freeze, OOM, robot sound, pops and voice recorder

- Fix DTS I2S pinmap to RLCD correct pins (mclk 16, bclk 9, ws 45, tx 8, rx 10) resolving GPIO5 conflict with display DC
- Port ES8311 DAC and ES7210 mic ADC init from working MicroPython audio_util.py
- Fix I2S DMA OOM by reducing to 6x160 and RX fallback to TX-only
- Fix MCLK multiple for 12.288MHz family (16k->768 exact) to avoid robot sound
- Avoid ES8311 reclock glitch for 16k rate to eliminate pop
- Clean log spam (file lock once, listDir DEBUG, I2S DEBUG) that caused UART jitter
- VoiceRecorder: request stereo from ES7210 and downmix left channel to fix mic-like low pitch
This commit is contained in:
Adolfo Reyna
2026-07-11 23:54:08 -04:00
parent 89c9f317c1
commit ff87ff4b1b
4 changed files with 298 additions and 68 deletions
@@ -119,7 +119,25 @@ static void get_esp32_std_config(Esp32I2sInternal* internal, const I2sConfig* co
slot_mode = I2S_SLOT_MODE_MONO;
}
std_cfg->clk_cfg = I2S_STD_CLK_DEFAULT_CONFIG(config->sample_rate);
// Fix for RLCD board: MCLK is 12.288MHz fixed (for 8/16/32/48k family).
// ESP-IDF default mclk_multiple=256 gives wrong MCLK (e.g. 16k*256=4.096MHz),
// causing WS to be generated from wrong MCLK and resulting in robot sound.
// We compute proper multiple for 12.288MHz family and use 256 for 44.1k family.
uint32_t rate = config->sample_rate;
i2s_mclk_multiple_t mclk_mult;
if (rate == 8000) mclk_mult = I2S_MCLK_MULTIPLE_1024; // 8k*1536=12.288MHz? 8k*1536 not supported, use 1536 closest is 1024 actually 8k*1536=12.288M, but 1024 gives 8.192M - use 768*2? use 1024 as best effort
else if (rate == 11025 || rate == 22050 || rate == 44100) mclk_mult = I2S_MCLK_MULTIPLE_256; // 44.1k family - 11.2896MHz, closest with 12.288MHz MCLK will cause slight pitch shift, better to let PLL handle
else if (rate == 12000) mclk_mult = I2S_MCLK_MULTIPLE_1024; // 12k*1024=12.288MHz exact
else if (rate == 16000) mclk_mult = I2S_MCLK_MULTIPLE_768; // 16k*768=12.288MHz exact
else if (rate == 24000) mclk_mult = I2S_MCLK_MULTIPLE_512; // 24k*512=12.288MHz exact
else if (rate == 32000) mclk_mult = I2S_MCLK_MULTIPLE_384; // 32k*384=12.288MHz exact
else if (rate == 48000) mclk_mult = I2S_MCLK_MULTIPLE_256; // 48k*256=12.288MHz exact
else if (rate % 8000 == 0) mclk_mult = I2S_MCLK_MULTIPLE_384; // fallback for 8k-family
else mclk_mult = I2S_MCLK_MULTIPLE_256; // fallback for 44.1k-family
std_cfg->clk_cfg = I2S_STD_CLK_DEFAULT_CONFIG(rate);
std_cfg->clk_cfg.clk_src = I2S_CLK_SRC_DEFAULT;
std_cfg->clk_cfg.mclk_multiple = mclk_mult;
std_cfg->slot_cfg = I2S_STD_PHILIPS_SLOT_DEFAULT_CONFIG(to_esp32_bits_per_sample(config->bits_per_sample), slot_mode);
if (config->communication_format & I2S_FORMAT_STAND_MSB) {
@@ -141,12 +159,13 @@ static void get_esp32_std_config(Esp32I2sInternal* internal, const I2sConfig* co
gpio_num_t ws_pin = get_native_pin(internal->ws_descriptor);
gpio_num_t data_out_pin = get_native_pin(internal->data_out_descriptor);
gpio_num_t data_in_pin = get_native_pin(internal->data_in_descriptor);
LOG_I(TAG, "Configuring I2S pins: MCLK=%d, BCLK=%d, WS=%d, DATA_OUT=%d, DATA_IN=%d", mclk_pin, bclk_pin, ws_pin, data_out_pin, data_in_pin);
// Reduced from INFO to DEBUG to avoid UART spam during playback causing jitter
LOG_D(TAG, "Configuring I2S pins: MCLK=%d, BCLK=%d, WS=%d, DATA_OUT=%d, DATA_IN=%d", mclk_pin, bclk_pin, ws_pin, data_out_pin, data_in_pin);
bool mclk_inverted = is_pin_inverted(internal->mclk_descriptor);
bool bclk_inverted = is_pin_inverted(internal->bclk_descriptor);
bool ws_inverted = is_pin_inverted(internal->ws_descriptor);
LOG_I(TAG, "Inverted pins: MCLK=%u, BCLK=%u, WS=%u", mclk_inverted, bclk_inverted, ws_inverted);
LOG_D(TAG, "Inverted pins: MCLK=%u, BCLK=%u, WS=%u", mclk_inverted, bclk_inverted, ws_inverted);
std_cfg->gpio_cfg = {
.mclk = mclk_pin,
@@ -206,8 +225,14 @@ static error_t set_config(Device* device, const struct I2sConfig* config) {
internal->rx_tdm_mode = false;
#endif
// Create new channel handles
// Create new channel handles — use smaller DMA to survive on memory-constrained
// devices like RLCD (ST7305 full_refresh + PSRAM + SDMMC). Default is
// dma_desc=6 dma_frame=240 (~5.7KB/ch). We use 6x160 (~3.8KB/ch) which
// balances glitch-free playback vs ESP_ERR_NO_MEM. Previous 4x120 was too
// small causing pops/repetitions.
i2s_chan_config_t chan_cfg = I2S_CHANNEL_DEFAULT_CONFIG(dts_config->port, I2S_ROLE_MASTER);
chan_cfg.dma_desc_num = 6;
chan_cfg.dma_frame_num = 160;
esp_err_t esp_error = i2s_new_channel(&chan_cfg, &internal->tx_handle, &internal->rx_handle);
if (esp_error != ESP_OK) {
LOG_E(TAG, "Failed to create I2S channels: %s", esp_err_to_name(esp_error));
@@ -218,14 +243,46 @@ static error_t set_config(Device* device, const struct I2sConfig* config) {
i2s_std_config_t std_cfg = {};
get_esp32_std_config(internal, config, &std_cfg);
// Notify board-specific hook for ES8311 reclocking (RLCD) - BEFORE channel init
// For 16k (most MP3 files on RLCD), hook does nothing to avoid pop
extern void waveshare_rlcd_on_i2s_rate_change(uint32_t sample_rate) __attribute__((weak));
if (waveshare_rlcd_on_i2s_rate_change) {
waveshare_rlcd_on_i2s_rate_change(config->sample_rate);
}
// For RLCD playback-only (Mp3Player), we don't need RX channel.
// Free RX to save ~3.8KB internal DMA and avoid its empty DMA spinning,
// which contributed to OOM and repetition artifacts.
// Keep TX only for now - RX will be recreated on next set_config if needed for recording.
bool need_rx = false; // TODO: detect if caller needs RX (record). For now, playback apps use write only.
// Heuristic: if both data_in and data_out pins exist, we normally need both,
// but for MP3 playback we can keep RX disabled to avoid underrun. Check if config
// is for playback by looking at channel usage? For now, always enable TX, disable RX
// to maximize playback quality. Recording (VoiceRecorder) will need RX - it calls set_config then read.
// VoiceRecorder uses 16k mono as well, so it would need RX. So we keep RX for now
// but with reduced memory: we already reduced DMA.
// Attempt to create TX first, if that succeeds, optionally skip RX for mono playback
// to avoid OOM repetition. Simplify: if we OOM with both, fallback to TX-only.
esp_err_t tx_err = ESP_OK, rx_err = ESP_OK;
if (internal->tx_handle) {
esp_error = i2s_channel_init_std_mode(internal->tx_handle, &std_cfg);
if (esp_error == ESP_OK) esp_error = i2s_channel_enable(internal->tx_handle);
tx_err = i2s_channel_init_std_mode(internal->tx_handle, &std_cfg);
if (tx_err == ESP_OK) tx_err = i2s_channel_enable(internal->tx_handle);
}
if (esp_error == ESP_OK && internal->rx_handle) {
esp_error = i2s_channel_init_std_mode(internal->rx_handle, &std_cfg);
if (esp_error == ESP_OK) esp_error = i2s_channel_enable(internal->rx_handle);
if (tx_err == ESP_OK && internal->rx_handle) {
rx_err = i2s_channel_init_std_mode(internal->rx_handle, &std_cfg);
if (rx_err == ESP_OK) rx_err = i2s_channel_enable(internal->rx_handle);
// If RX fails (OOM), keep TX working for playback - this was the MP3 OOM case
if (rx_err != ESP_OK) {
LOG_W(TAG, "RX init failed (%s), keeping TX-only for playback", esp_err_to_name(rx_err));
i2s_channel_disable(internal->rx_handle);
i2s_del_channel(internal->rx_handle);
internal->rx_handle = nullptr;
rx_err = ESP_OK; // don't fail overall if TX works
}
}
esp_error = tx_err;
if (esp_error == ESP_OK && rx_err != ESP_OK) esp_error = rx_err;
if (esp_error != ESP_OK) {
LOG_E(TAG, "Failed to initialize/enable I2S channels: %s", esp_err_to_name(esp_error));
@@ -323,10 +380,11 @@ static error_t set_rx_tdm_config(Device* device, const struct I2sTdmRxConfig* co
uint32_t bytes_per_sample = config->bits_per_sample / 8u;
// Size DMA buffers so that each descriptor covers at most 4096 bytes.
// Start at 512 frames and halve until one frame × slot_count × bytes fits.
uint32_t frame_num = 512u;
uint32_t dma_desc_num = 8u;
while (frame_num > 64u && frame_num * (uint32_t)config->slot_count * bytes_per_sample > 4096u) {
// RLCD fix: use tiny DMA to avoid ESP_ERR_NO_MEM on internal RAM.
// Mp3Player playback previously failed with i2s_alloc_dma_desc OOM.
uint32_t frame_num = 120u;
uint32_t dma_desc_num = 4u;
while (frame_num > 32u && frame_num * (uint32_t)config->slot_count * bytes_per_sample > 4096u) {
frame_num /= 2u;
}