SPI HAL implemented and more (#207)

- Cleanup unused code and move ISR/IRQ checks to `Kernel.h`
- Improve clang-format
- Fix for LVGL lock transfer: ensure lock isn't activate when changing the lock
- Implement SPI HAL
- Remove `initHardware` HAL configuration entry
- Fix `I2cScanner`: don't scan when port isn't started

TactilityHeadless/Include/Tactility/hal/spi/Spi.h

@@ -0,0 +1,48 @@
+#pragma once
+
+#include "SpiCompat.h"
+
+#include <Tactility/Lockable.h>
+#include <Tactility/RtosCompat.h>
+
+#include <vector>
+#include <memory>
+
+namespace tt::hal::spi {
+
+enum class InitMode {
+    ByTactility, // Tactility will initialize it in the correct bootup phase
+    ByExternal, // The device is already initialized and Tactility should assume it works
+    Disabled // Not initialized by default
+};
+
+struct Configuration {
+    spi_host_device_t device;
+    spi_common_dma_t dma;
+    spi_bus_config_t config;
+    /** Whether this bus should be initialized when device starts up */
+    InitMode initMode;
+    /** Whether this bus can stopped and re-started. */
+    bool canReinit;
+    /** Whether configuration can be changed. */
+    bool hasMutableConfiguration;
+    /** Optional custom lock */
+    std::shared_ptr<Lockable> _Nullable lock;
+};
+
+enum class Status {
+    Started,
+    Stopped,
+    Unknown
+};
+
+bool init(const std::vector<spi::Configuration>& configurations);
+
+bool start(spi_host_device_t device);
+bool stop(spi_host_device_t device);
+bool isStarted(spi_host_device_t device);
+
+bool lock(spi_host_device_t device, TickType_t timeout = 10 / portTICK_PERIOD_MS);
+bool unlock(spi_host_device_t device);
+
+} // namespace tt::hal::spi

TactilityHeadless/Include/Tactility/hal/spi/SpiCompat.h

@@ -0,0 +1,58 @@
+#pragma once
+
+#ifdef ESP_PLATFORM
+#include <driver/spi_common.h>
+#else
+
+#include <cstdint>
+
+enum spi_host_device_t {
+    SPI1_HOST = 0,
+    SPI2_HOST = 1,
+    SPI3_HOST = 2,
+    SPI_HOST_MAX,
+};
+
+enum spi_common_dma_t {
+    SPI_DMA_DISABLED = 0, ///< No DMA
+    SPI_DMA_CH1 = 1, ///< DMA, select DMA Channel 1
+    SPI_DMA_CH2 = 2, ///< DMA, select DMA Channel 2
+    SPI_DMA_CH_AUTO = 3, ///< DMA, channel selected by driver
+};
+
+enum esp_intr_cpu_affinity_t {
+    ESP_INTR_CPU_AFFINITY_AUTO,
+    ESP_INTR_CPU_AFFINITY_0,
+    ESP_INTR_CPU_AFFINITY_1,
+};
+
+struct spi_bus_config_t {
+    union {
+        int mosi_io_num;
+        int data0_io_num;
+    };
+    union {
+        int miso_io_num;
+        int data1_io_num;
+    };
+    int sclk_io_num;
+    union {
+        int quadwp_io_num;
+        int data2_io_num;
+    };
+    union {
+        int quadhd_io_num;
+        int data3_io_num;
+    };
+    int data4_io_num;
+    int data5_io_num;
+    int data6_io_num;
+    int data7_io_num;
+    bool data_io_default_level;
+    int max_transfer_sz;
+    uint32_t flags;
+    esp_intr_cpu_affinity_t isr_cpu_id;
+    int intr_flags;
+};
+
+#endif