SPI HAL implemented and more (#207)

- Cleanup unused code and move ISR/IRQ checks to `Kernel.h`
- Improve clang-format
- Fix for LVGL lock transfer: ensure lock isn't activate when changing the lock
- Implement SPI HAL
- Remove `initHardware` HAL configuration entry
- Fix `I2cScanner`: don't scan when port isn't started
This commit is contained in:
Ken Van Hoeylandt
2025-02-08 00:21:50 +01:00
committed by GitHub
parent 88b3bfbe3e
commit c1f55429b6
41 changed files with 634 additions and 428 deletions
+1 -39
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@@ -5,48 +5,12 @@
#include <Tactility/Log.h>
#include <Tactility/kernel/Kernel.h>
#include <driver/i2c.h>
#include <driver/spi_master.h>
#include <esp_intr_types.h>
#define TAG "core2"
#define CORES3_SPI2_PIN_SCLK GPIO_NUM_36
#define CORES3_SPI2_PIN_MOSI GPIO_NUM_37
#define CORES3_SPI2_PIN_MISO GPIO_NUM_35
std::shared_ptr<Axp2101> axp2101;
std::shared_ptr<Aw9523> aw9523;
/**
* For details see https://github.com/espressif/esp-bsp/blob/master/bsp/m5stack_core_s3/m5stack_core_s3.c
*/
static bool initSpi3() {
TT_LOG_I(TAG, LOG_MESSAGE_SPI_INIT_START_FMT, SPI3_HOST);
const spi_bus_config_t bus_config = {
.mosi_io_num = CORES3_SPI2_PIN_MOSI,
.miso_io_num = CORES3_SPI2_PIN_MISO,
.sclk_io_num = CORES3_SPI2_PIN_SCLK,
.data2_io_num = GPIO_NUM_NC,
.data3_io_num = GPIO_NUM_NC,
.data4_io_num = GPIO_NUM_NC,
.data5_io_num = GPIO_NUM_NC,
.data6_io_num = GPIO_NUM_NC,
.data7_io_num = GPIO_NUM_NC,
.data_io_default_level = false,
.max_transfer_sz = CORES3_LCD_DRAW_BUFFER_SIZE,
.flags = 0,
.isr_cpu_id = ESP_INTR_CPU_AFFINITY_AUTO,
.intr_flags = 0
};
if (spi_bus_initialize(SPI3_HOST, &bus_config, SPI_DMA_CH_AUTO) != ESP_OK) {
TT_LOG_E(TAG, LOG_MESSAGE_SPI_INIT_FAILED_FMT, SPI3_HOST);
return false;
}
return true;
}
/**
* For details see https://github.com/espressif/esp-bsp/blob/master/bsp/m5stack_core_s3/m5stack_core_s3.c
* and schematic: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/K128%20CoreS3/Sch_M5_CoreS3_v1.0.pdf
@@ -184,7 +148,5 @@ bool initBoot() {
aw9523 = std::make_shared<Aw9523>(I2C_NUM_0);
tt::hal::registerDevice(aw9523);
return initPowerControl() &&
initGpioExpander() &&
initSpi3();
return initPowerControl() && initGpioExpander();
}
+31 -1
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@@ -1,9 +1,13 @@
#include "M5stackCoreS3.h"
#include "InitBoot.h"
#include "InitLvgl.h"
#include "Tactility/lvgl/LvglSync.h"
#include "hal/CoreS3Display.h"
#include "hal/CoreS3SdCard.h"
#include "hal/CoreS3DisplayConstants.h"
#include "hal/CoreS3Power.h"
#include "hal/CoreS3SdCard.h"
#define CORES3_TRANSACTION_SIZE (CORES3_LCD_DRAW_BUFFER_SIZE * LV_COLOR_DEPTH / 8)
const tt::hal::Configuration m5stack_cores3 = {
.initBoot = initBoot,
@@ -48,5 +52,31 @@ const tt::hal::Configuration m5stack_cores3 = {
.clk_flags = 0
}
}
},
.spi {
tt::hal::spi::Configuration {
.device = SPI3_HOST,
.dma = SPI_DMA_CH_AUTO,
.config = {
.mosi_io_num = GPIO_NUM_37,
.miso_io_num = GPIO_NUM_35,
.sclk_io_num = GPIO_NUM_36,
.data2_io_num = GPIO_NUM_NC,
.data3_io_num = GPIO_NUM_NC,
.data4_io_num = GPIO_NUM_NC,
.data5_io_num = GPIO_NUM_NC,
.data6_io_num = GPIO_NUM_NC,
.data7_io_num = GPIO_NUM_NC,
.data_io_default_level = false,
.max_transfer_sz = CORES3_TRANSACTION_SIZE,
.flags = 0,
.isr_cpu_id = ESP_INTR_CPU_AFFINITY_AUTO,
.intr_flags = 0
},
.initMode = tt::hal::spi::InitMode::ByTactility,
.canReinit = false,
.hasMutableConfiguration = false,
.lock = tt::lvgl::getLvglSyncLockable() // esp_lvgl_port owns the lock for the display
}
}
};