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SPI HAL implemented and more (#207)

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- Cleanup unused code and move ISR/IRQ checks to `Kernel.h`
- Improve clang-format
- Fix for LVGL lock transfer: ensure lock isn't activate when changing the lock
- Implement SPI HAL
- Remove `initHardware` HAL configuration entry
- Fix `I2cScanner`: don't scan when port isn't started
This commit is contained in:
Ken Van Hoeylandt
2025-02-08 00:21:50 +01:00
committed by GitHub
parent 88b3bfbe3e
commit c1f55429b6
41 changed files with 634 additions and 428 deletions
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Boards/M5stackCore2/Source/InitBoot.cpp
+3 -36
View File
@@ -1,4 +1,3 @@
#include "hal/Core2DisplayConstants.h"
#include "axp192/axp192.h"
#include <Tactility/Log.h>
@@ -7,14 +6,9 @@
#include <driver/i2c.h>
#include <driver/spi_master.h>
#include <esp_intr_types.h>
#define TAG "core2"
#define CORE2_SPI2_PIN_SCLK GPIO_NUM_18
#define CORE2_SPI2_PIN_MOSI GPIO_NUM_23
#define CORE2_SPI2_PIN_MISO GPIO_NUM_38
axp192_t axpDevice;
static int32_t axpI2cRead(TT_UNUSED void* handle, uint8_t address, uint8_t reg, uint8_t* buffer, uint16_t size) {
@@ -33,33 +27,7 @@ static int32_t axpI2cWrite(TT_UNUSED void* handle, uint8_t address, uint8_t reg,
}
}
static bool initSpi2() {
TT_LOG_I(TAG, LOG_MESSAGE_SPI_INIT_START_FMT, SPI2_HOST);
const spi_bus_config_t bus_config = {
.mosi_io_num = CORE2_SPI2_PIN_MOSI,
.miso_io_num = CORE2_SPI2_PIN_MISO,
.sclk_io_num = CORE2_SPI2_PIN_SCLK,
.data2_io_num = GPIO_NUM_NC,
.data3_io_num = GPIO_NUM_NC,
.data4_io_num = GPIO_NUM_NC,
.data5_io_num = GPIO_NUM_NC,
.data6_io_num = GPIO_NUM_NC,
.data7_io_num = GPIO_NUM_NC,
.max_transfer_sz = CORE2_LCD_DRAW_BUFFER_SIZE,
.flags = 0,
.isr_cpu_id = ESP_INTR_CPU_AFFINITY_AUTO,
.intr_flags = 0
};
if (spi_bus_initialize(SPI2_HOST, &bus_config, SPI_DMA_CH_AUTO) != ESP_OK) {
TT_LOG_E(TAG, LOG_MESSAGE_SPI_INIT_FAILED_FMT, SPI2_HOST);
return false;
}
return true;
}
bool initAxp() {
void initAxp() {
axpDevice.read = axpI2cRead;
axpDevice.write = axpI2cWrite;
@@ -74,11 +42,10 @@ bool initAxp() {
axp192_write(&axpDevice, AXP192_PWM1_DUTY_CYCLE_2, 255); // PWM 255 (LED OFF)
axp192_write(&axpDevice, AXP192_GPIO1_CONTROL, 0x02); // GPIO1 PWM
// TODO: We could charge at 390mA according to the M5Unified code, but the AXP driver in M5Unified limits to 132mA, so it's unclear what the AXP supports.
return true;
}
bool initBoot() {
TT_LOG_I(TAG, "initBoot");
return initAxp() && initSpi2();
initAxp();
return true;
}
Boards/M5stackCore2/Source/M5stackCore2.cpp
+31 -1
View File
@@ -1,9 +1,13 @@
#include "M5stackCore2.h"
#include "InitBoot.h"
#include "InitLvgl.h"
#include "Tactility/lvgl/LvglSync.h"
#include "hal/Core2Display.h"
#include "hal/Core2SdCard.h"
#include "hal/Core2DisplayConstants.h"
#include "hal/Core2Power.h"
#include "hal/Core2SdCard.h"
#define CORE2_SPI_TRANSFER_SIZE_LIMIT (CORE2_LCD_DRAW_BUFFER_SIZE * LV_COLOR_DEPTH / 8)
extern const tt::hal::Configuration m5stack_core2 = {
.initBoot = initBoot,
@@ -48,5 +52,31 @@ extern const tt::hal::Configuration m5stack_core2 = {
.clk_flags = 0
}
}
},
.spi {
tt::hal::spi::Configuration {
.device = SPI2_HOST,
.dma = SPI_DMA_CH_AUTO,
.config = {
.mosi_io_num = GPIO_NUM_23,
.miso_io_num = GPIO_NUM_38,
.sclk_io_num = GPIO_NUM_18,
.quadwp_io_num = -1, // Quad SPI LCD driver is not yet supported
.quadhd_io_num = -1, // Quad SPI LCD driver is not yet supported
.data4_io_num = 0,
.data5_io_num = 0,
.data6_io_num = 0,
.data7_io_num = 0,
.data_io_default_level = false,
.max_transfer_sz = CORE2_SPI_TRANSFER_SIZE_LIMIT,
.flags = 0,
.isr_cpu_id = ESP_INTR_CPU_AFFINITY_AUTO,
.intr_flags = 0
},
.initMode = tt::hal::spi::InitMode::ByTactility,
.canReinit = false,
.hasMutableConfiguration = false,
.lock = tt::lvgl::getLvglSyncLockable() // esp_lvgl_port owns the lock for the display
}
}
};