Driver improvements (#535)

- New drivers:
  - SD SPI
  - spi_peripheral
  - touch_placeholder
  - display_placeholder
- Devicetree compiler:
  - Implement phandle-arrays
  - Implement device addresses
- Add placeholder drivers to all devices with a SPI display
- SPI driver: add `cs-pins` and set them to high on driver start
- FileSystem: add `file_system_set_owner()` and `file_system_get_owner()`
- File locking is now checking if the related `FileSystem` is part of a shared SPI bus
- Add `device_get_child_count()`
- SDMMC driver: Remove default of `slot` value
- Fix for Crowpanel Basic 3.5" display (add delay to booting)
- Fix for LilyGO T-HMI SD card mounting (delayed mounting by disabling it initially in the dts)
This commit is contained in:
Ken Van Hoeylandt
2026-06-27 17:32:05 +02:00
committed by GitHub
parent e50659a3fb
commit 599fa46766
222 changed files with 1713 additions and 2257 deletions
@@ -8,11 +8,11 @@ properties:
required: true
description: "One of enum Esp32GroveMode"
pinSdaTx:
type: phandle-array
type: phandles
required: true
description: SDA (I2C) or TX (UART) pin
pinSclRx:
type: phandle-array
type: phandles
required: true
description: SCL (I2C) or RX (UART) pin
uartPort:
@@ -22,8 +22,8 @@ properties:
Clock source for the I2C peripheral.
If not specified, a default clock source will be used.
pin-sda:
type: phandle-array
type: phandles
required: true
pin-scl:
type: phandle-array
type: phandles
required: true
@@ -16,8 +16,8 @@ properties:
required: true
description: Initial clock frequency in Hz
pin-sda:
type: phandle-array
type: phandles
required: true
pin-scl:
type: phandle-array
type: phandles
required: true
@@ -12,22 +12,22 @@ properties:
The port number, defined by i2s_port_t.
Depending on the hardware, these values are available: I2S_NUM_0, I2S_NUM_1
pin-bclk:
type: phandle-array
type: phandles
required: true
description: Bit clock pin
pin-ws:
type: phandle-array
type: phandles
required: true
description: Word (slot) select pin
pin-data-out:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
description: Data output pin
pin-data-in:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
description: Data input pin
pin-mclk:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
description: Master clock pin
@@ -4,40 +4,40 @@ compatible: "espressif,esp32-sdmmc"
properties:
pin-clk:
type: phandle-array
type: phandles
required: true
pin-cmd:
type: phandle-array
type: phandles
required: true
pin-d0:
type: phandle-array
type: phandles
required: true
pin-d1:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
pin-d2:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
pin-d3:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
pin-d4:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
pin-d5:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
pin-d6:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
pin-d7:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
pin-cd:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
pin-wp:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
bus-width:
type: int
@@ -45,7 +45,6 @@ properties:
description: Bus width in bits
slot:
type: int
default: 1
enum: [0, 1]
description: SDMMC host slot number (SDMMC_HOST_SLOT_0 or SDMMC_HOST_SLOT_1). On ESP32-P4, slot 0 uses the dedicated (non-GPIO-matrix) pins.
max-freq-khz:
@@ -0,0 +1,23 @@
description: ESP32 SD card over SPI
compatible: "espressif,esp32-sdspi"
bus: spi
properties:
pin-cd:
type: phandles
default: GPIO_PIN_SPEC_NONE
description: Card detect GPIO
pin-wp:
type: phandles
default: GPIO_PIN_SPEC_NONE
description: Write protect GPIO
pin-int:
type: phandles
default: GPIO_PIN_SPEC_NONE
description: Interrupt GPIO
frequency-khz:
type: int
required: true
description: SPI clock frequency in kHz
@@ -12,27 +12,32 @@ properties:
The SPI host (controller) to use.
Defined by spi_host_device_t (e.g. SPI2_HOST, SPI3_HOST).
pin-sclk:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
pin-mosi:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
description: MOSI (Data 0) pin
pin-miso:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
description: MISO (Data 1) pin
pin-wp:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
description: WP (Data 2) pin
pin-hd:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
description: HD (Data 3) pin
max-transfer-size:
type: int
default: 0
description: |
Data transfer size limit in bytes.
Data transfer size limit in bytes.
0 means the platform decides the limit.
cs-gpios:
type: phandle-array
element-type: "struct GpioPinSpec"
default: "{ }"
description: Null-terminated array of chip select GPIO pin specs for peripherals on this bus
@@ -12,18 +12,18 @@ properties:
The port number, defined by uart_port_t.
Depending on the hardware, these values are available: UART_NUM_0, UART_NUM_1, UART_NUM_2
pin-tx:
type: phandle-array
type: phandles
required: true
description: TX pin
pin-rx:
type: phandle-array
type: phandles
required: true
description: RX pin
pin-cts:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
description: CTS pin
pin-rts:
type: phandle-array
type: phandles
default: GPIO_PIN_SPEC_NONE
description: RTS pin