Various fixes and improvements (#269)
- Bump version for next release - Fix default gamma for CYD 2432S032C - Remember gamma curve setting from Display settings app - Add UART to Core2 (still has no voltage on Grove port, though) - LVGL performance improvements: pin to second core and set task priority to "critical" - Fix build warnings, including deprecations - Removed deprecated `Thread` constructor - Fix WaveShare S3 display: Some displays would show a white screen at 12MHz, so I'm putting it back to the official config values.
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@@ -9,6 +9,8 @@
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#define CORE2_SPI_TRANSFER_SIZE_LIMIT (CORE2_LCD_DRAW_BUFFER_SIZE * LV_COLOR_DEPTH / 8)
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using namespace tt::hal;
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extern const tt::hal::Configuration m5stack_core2 = {
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.initBoot = initBoot,
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.createDisplay = createDisplay,
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@@ -74,5 +76,30 @@ extern const tt::hal::Configuration m5stack_core2 = {
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.isMutable = false,
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.lock = tt::lvgl::getSyncLock() // esp_lvgl_port owns the lock for the display
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}
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},
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.uart {
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uart::Configuration {
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.name = "Grove",
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.port = UART_NUM_1,
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.rxPin = GPIO_NUM_32,
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.txPin = GPIO_NUM_33,
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.rtsPin = GPIO_NUM_NC,
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.ctsPin = GPIO_NUM_NC,
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.rxBufferSize = 1024,
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.txBufferSize = 1024,
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.config = {
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.baud_rate = 115200,
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.data_bits = UART_DATA_8_BITS,
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.parity = UART_PARITY_DISABLE,
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.stop_bits = UART_STOP_BITS_1,
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.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
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.rx_flow_ctrl_thresh = 0,
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.source_clk = UART_SCLK_DEFAULT,
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.flags = {
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.allow_pd = 0,
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.backup_before_sleep = 0,
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}
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}
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},
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}
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};
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